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1 features applications description TPA3124D2 www.ti.com ........................................................................................................................................................................................................ slos578 ? may 2008 15-w stereo class-d audio power amplifier flat panel televisions 234 10-w/ch into an 8- ? load from a 24-v supply dlp ? tvs 15-w/ch into a 4- ? load from a 22-v supply crt tvs 30-w/ch into a 8- ? load from a 22-v supply powered speakers operates from 10 v to 26 v can run from +24 v lcd backlight supply efficient class-d operation eliminates need the TPA3124D2 is a 15-w (per channel), efficient, for heat sinks class-d audio power amplifier for driving stereo four selectable, fixed-gain settings speakers in a single-ended configuration; or, a mono internal oscillator (no external components speaker in a bridge-tied-load configuration. the TPA3124D2 can drive stereo speakers as low as 4 ? . required) the efficiency of the TPA3124D2 eliminates the need single-ended analog inputs for an external heat sink when playing music. thermal and short-circuit protection with the gain of the amplifier is controlled by two gain auto recovery select pins. the gain selections are 20, 26, 32, and space-saving surface mount 24-pin tssop 36 db. package the patented start-up and shutdown sequences advanced power-off pop reduction minimize pop noise in the speakers without additional circuitry. 1 please be aware that an important notice concerning availability, standard warranty, and use in critical applications of texas instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 2 dlp is a registered trademark of texas instruments. 3 system two, audio precision are trademarks of audio precision, inc. 4 all other trademarks are the property of their respective owners. production data information is current as of publication date. copyright ? 2008, texas instruments incorporated products conform to specifications per the terms of the texas instruments standard warranty. production processing does not necessarily include testing of all parameters. 1 f m sd mute control pvccl TPA3124D2 simplified application circuit pvccr vclamp gain1 bypass 1 f m 1 f m 0.22 f m agnd left channel right channel 10 v to 26 v 10 v to 26 v 4-step gain control shutdown control linrin bsr bsl pgndr pgndl 0.22 f m 33 h m 33 h m 470 f m 0.22 f m 1 f m 470 f m gain0 avcc mute rout lout s0267-02 0.22 f m
TPA3124D2 slos578 ? may 2008 ........................................................................................................................................................................................................ www.ti.com these devices have limited built-in esd protection. the leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the mos gates. pwp (tssop) package (top view) table 1. terminal functions terminal i/o/p description 24-pin name (pwp) shutdown signal for ic (low = disabled, high = operational). ttl logic levels with compliance to sd 2 i avcc rin 6 i audio input for right channel lin 5 i audio input for left channel gain0 18 i gain select least-significant bit. ttl logic levels with compliance to avcc gain1 17 i gain select most-significant bit. ttl logic levels with compliance to avcc mute signal for quick disable/enable of outputs (high = outputs switch at 50% duty cycle, low = mute 4 i outputs enabled). ttl logic levels with compliance to avcc bsl 21 i/o bootstrap i/o for left channel pvccl 1, 3 p power supply for left-channel h-bridge, not internally connected to pvccr or avcc lout 22 o class-d -h-bridge positive output for left channel pgndl 23, 24 p power ground for left-channel h-bridge vclamp 11 p internally generated voltage supply for bootstrap capacitors bsr 16 i/o bootstrap i/o for right channel rout 15 o class-d -h-bridge negative output for right channel pgndr 13, 14 p power ground for right-channel h-bridge. pvccr 10, 12 p power supply for right-channel h-bridge, not connected to pvccl or avcc agnd 9 p analog ground for digital/analog cells in core agnd 8 p analog ground for analog cells in core reference for preamplifier inputs. nominally equal to avcc/8. also controls start-up time via bypass 7 o external capacitor sizing. avcc 19, 20 p high-voltage analog power supply. not internally connected to pvccr or pvccl connect to ground. thermal pad should be soldered down on all applications to secure the thermal pad die pad p device properly to the printed wiring board. 2 submit documentation feedback copyright ? 2008, texas instruments incorporated product folder link(s): TPA3124D2 12 3 4 5 6 7 8 9 10 11 12 pvccl sd pvccl mute lin rin bypass agndagnd pvccr vclamp pvccr 24 23 22 21 20 1918 17 16 15 14 13 pgndlpgndl lout bsl avcc avcc gain0gain1 bsr rout pgndr pgndr
absolute maximum ratings dissipation ratings recommended operating conditions TPA3124D2 www.ti.com ........................................................................................................................................................................................................ slos578 ? may 2008 over operating free-air temperature range (unless otherwise noted) (1) value unit v cc supply voltage avcc, pvcc ? 0.3 to 30 v v i logic input voltage sd, mute, gain0, gain1 ? 0.3 to v cc + 0.3 v v in analog input voltage rin, lin ? 0.3 to 7 v continuous total power dissipation see dissipation rating table t a operating free-air temperature range ? 40 to 85 c t j operating junction temperature range ? 40 to 150 c t stg storage temperature range ? 65 to 150 c se output configuration 3.2 r l load resistance (minimum value) ? btl output configuration 6.4 human body model (all pins) 2 kv esd electrostatic discharge charged-device model (all 500 v pins) (1) stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. package (1) (2) t a 25 c derating factor t a = 70 c t a = 85 c 24-pin tssop 4.16 w 33.3 mw/ c 2.67 w 2.16 w (1) for the most current package and ordering information, see the package option addendum at the end of this document, or see the ti website at www.ti.com . (2) this data was taken using 1 oz trace and copper pad that is soldered directly to a jedec standard high-k pcb. the thermal pad must be soldered to a thermal land on the printed-circuit board. see the powerpad thermally enhanced package application note (slma002 ). min max unit v cc supply voltage pvcc, avcc 10 26 v v ih high-level input voltage sd, mute, gain0, gain1 2 v v il low-level input voltage sd, mute, gain0, gain1 0.8 v sd, v i = v cc , v cc = 30 v 125 i ih high-level input current mute, v i = v cc , v cc = 30 v 125 m a gain0, gain1, v i = v cc , v cc = 24 v 125 sd, v i = 0, v cc = 30 v 1 i il low-level input current mute, v i = 0 v, v cc = 30 v 1 m a gain0, gain1, v i = 0 v, v cc = 24 v 1 t a operating free-air temperature ? 40 85 c copyright ? 2008, texas instruments incorporated submit documentation feedback 3 product folder link(s): TPA3124D2
dc characteristics ac characteristics TPA3124D2 slos578 ? may 2008 ........................................................................................................................................................................................................ www.ti.com t a = 25 c, v cc = 24 v, r l =8 ? (unless otherwise noted) parameter test conditions min typ max unit class-d output offset voltage | v os | (measured differentially in btl v i = 0 v, a v = 36 db 7.5 50 mv mode as shown in figure 36 ) v (bypass) bypass output voltage no load avcc/8 v i cc(q) quiescent supply current sd = 2 v, mute = 0 v, no load 16 30 ma i cc(q) quiescent supply current in mute = 0.8 v, no load 16 ma mute mode i cc(q) quiescent supply current in sd = 0.8 v, no load 0.39 1 ma shutdown mode r ds(on) drain-source on-state 450 210 m ? resistance gain0 = 0.8 v 18 20 22 gain1 = 0.8 v gain0 = 2 v 24 26 28 g gain db gain0 = 0.8 v 30 32 34 gain = 2 v gain0 = 2 v 34 36 38 mute attenuation v i = 1 vrms ? 80 db t a = 25 c, v cc = 24 v, r l = 8 ? (unless otherwise noted) parameter test conditions min typ max unit v cc = 24, v ripple = 200 mv pp 100 hz ? 48 ksvr supply ripple rejection db gain = 20 db 1 khz ? 52 output power at 1% thd+n v cc = 24 v, f = 1 khz 8 p o w output power at 10% thd+n v cc = 24 v, f = 1 khz 10 total harmonic distortion + f = 1 khz, p o = 5 w 0.04% thd+n noise 125 m v 20 hz to 22 khz, a-weighted filter, v n output integrated noise floor gain = 20 db ? 78 dbv crosstalk p o = 1 w, f = 1 khz; gain = 20 db ? 70 db max output at thd+n < 1%, f = 1 khz, snr signal-to-noise ratio ? 92 db gain = 20 db thermal trip point 150 c thermal hysteresis 30 c f osc oscillator frequency 250 300 350 khz t mute mute delay time from mute input switches high until 30 m sec outputs muted t unmute unmute delay time from mute input switches low until 120 msec outputs unmuted 4 submit documentation feedback copyright ? 2008, texas instruments incorporated product folder link(s): TPA3124D2
functional block diagram TPA3124D2 www.ti.com ........................................................................................................................................................................................................ slos578 ? may 2008 copyright ? 2008, texas instruments incorporated submit documentation feedback 5 product folder link(s): TPA3124D2 ls hs osc/ramp bypass avdd avcc lin rin mute bypass gain1 gain0 sd bsl pvccl lout pgndl vclamp bsr pvccr rout pgndr vclamp avdd avdd avdd/2 avdd avdd avdd/2 regulator agnd + + C C control bias thermal mute control av control sc detect sc detect ls hs vclamp
typical characteristics TPA3124D2 slos578 ? may 2008 ........................................................................................................................................................................................................ www.ti.com all tests are made at frequency = 1 khz unless otherwise noted. total harmonic distortion + noise total harmonic distortion + noise vs vs frequency frequency figure 1. figure 2. total harmonic distortion + noise total harmonic distortion + noise vs vs frequency frequency figure 3. figure 4. 6 submit documentation feedback copyright ? 2008, texas instruments incorporated product folder link(s): TPA3124D2 f ? frequency ? hz 20 v cc = 24 v r l = 8 w (se) gain = 20 db 100 1k 10k thd+n ? t otal harmonic distortion + noise ? % 0.001 10 20k 0.1 g004 1 p o = 1 w p o = 5 w 0.01 p o = 2.5 w f ? frequency ? hz 20 v cc = 18 v r l = 8 w (se) gain = 20 db 100 1k 10k thd+n ? t otal harmonic distortion + noise ? % 0.001 10 20k 0.1 g003 1 p o = 2.5 w 0.01 p o = 1 w f ? frequency ? hz 20 v cc = 18 v r l = 6 w (se) gain = 20 db 100 1k 10k thd+n ? t otal harmonic distortion + noise ? % 0.001 10 20k 0.1 g002 1 p o = 0.5 w p o = 2.5 w 0.01 p o = 1 w f ? frequency ? hz 20 v cc = 12 v r l = 4 w (se) gain = 20 db 100 1k 10k thd+n ? t otal harmonic distortion + noise ? % 0.001 10 20k 0.1 g001 1 p o = 0.5 w p o = 2.5 w 0.01 p o = 1 w
TPA3124D2 www.ti.com ........................................................................................................................................................................................................ slos578 ? may 2008 typical characteristics (continued) all tests are made at frequency = 1 khz unless otherwise noted. total harmonic distortion + noise total harmonic distortion + noise vs vs output power output power figure 5. figure 6. total harmonic distortion + noise crosstalk vs vs output power frequency figure 7. figure 8. copyright ? 2008, texas instruments incorporated submit documentation feedback 7 product folder link(s): TPA3124D2 p o ? output power ? w 0.01 r l = 4 w (se) gain = 20 db 0.1 1 10 thd+n ? t otal harmonic distortion + noise ? % 0.001 0.01 10 40 0.1 g005 1 v cc = 12 v p o ? output power ? w 0.01 r l = 6 w (se) gain = 20 db 0.1 1 10 thd+n ? t otal harmonic distortion + noise ? % 0.001 0.01 10 40 0.1 g006 1 v cc = 12 v v cc = 18 v ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 f ? frequency ? hz crosstalk ? db g008 20 100 1k 10k 20k left to right right to left v cc = 12 v v o = 1 v rms r l = 4 w (se) p o = 0.25 w gain = 20 db p o ? output power ? w 0.01 r l = 8 w (se) gain = 20 db 0.1 1 10 thd+n ? t otal harmonic distortion + noise ? % 0.001 0.01 10 40 0.1 g007 1 v cc = 12 v v cc = 18 v v cc = 24 v
TPA3124D2 slos578 ? may 2008 ........................................................................................................................................................................................................ www.ti.com typical characteristics (continued) all tests are made at frequency = 1 khz unless otherwise noted. crosstalk crosstalk vs vs frequency frequency figure 9. figure 10. gain/phase gain/phase vs vs frequency frequency figure 11. figure 12. 8 submit documentation feedback copyright ? 2008, texas instruments incorporated product folder link(s): TPA3124D2 f ? frequency ? hz phase ? 20 100 1k 100k 10k g011 600500 400 300 200 100 0 ?100 ?200 0 5 10 15 20 25 30 35 40 gain ? db phase gain v cc = 24 v r l = 4 w (se) gain = 20 dbl filt = 22 m h c filt = 0.68 m f c dc = 1000 m f f ? frequency ? hz phase ? 20 100 1k 100k 10k g012 600500 400 300 200 100 0 ?100 ?200 0 5 10 15 20 25 30 35 40 gain ? db phase gain v cc = 24 v r l = 8 w (se) gain = 20 dbl filt = 33 m h c filt = 0.22 m f c dc = 470 m f ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 f ? frequency ? hz crosstalk ? db g009 20 100 1k 10k 20k left to right right to left v cc = 18 v v o = 1 v rms r l = 8 w (se) p o = 0.125 w gain = 20 db ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 f ? frequency ? hz crosstalk ? db g010 20 100 1k 10k 20k left to right right to left v cc = 24 v v o = 1 v rms r l = 8 w (se) p o = 0.125 w gain = 20 db
TPA3124D2 www.ti.com ........................................................................................................................................................................................................ slos578 ? may 2008 typical characteristics (continued) all tests are made at frequency = 1 khz unless otherwise noted. output power output power vs vs supply voltage supply voltage figure 14. a. dashed line represents thermally limited region. figure 13. efficiency efficiency vs vs output power output power figure 15. figure 16. copyright ? 2008, texas instruments incorporated submit documentation feedback 9 product folder link(s): TPA3124D2 v cc ? supply v oltage ? v 0 1 2 3 4 5 6 7 8 9 10 10 11 12 13 14 15 p o ? output power ? w g013 thd+n = 1% thd+n = 10% r l = 4 w (se) gain = 20 db p o ? output power ? w 0 10 20 30 40 50 60 70 80 90 100 0 2 4 6 8 10 12 ef ficiency ? % g016 v cc = 18 v r l = 8 w (se) gain = 20 db v cc = 24 v v cc ? supply v oltage ? v 0 2 4 6 8 10 12 14 10 12 14 16 18 20 22 24 26 p o ? output power ? w g014 thd+n = 1% thd+n = 10% r l = 8 w (se) gain = 20 db p o ? output power ? w 0 10 20 30 40 50 60 70 80 90 100 0 1 2 3 4 5 6 7 ef ficiency ? % g015 r l = 4 w (se) gain = 20 db v cc = 12 v
TPA3124D2 slos578 ? may 2008 ........................................................................................................................................................................................................ www.ti.com typical characteristics (continued) all tests are made at frequency = 1 khz unless otherwise noted. supply current supply current vs vs output power output power figure 17. a. dashed line represents thermally limited region. figure 18. power supply rejection ratio power supply rejection ratio vs vs frequency frequency figure 19. figure 20. 10 submit documentation feedback copyright ? 2008, texas instruments incorporated product folder link(s): TPA3124D2 p o ? output power ? w 0.0 0.3 0.6 0.9 1.2 1.5 0 3 6 9 12 15 i cc ? supply current ? a g017 r l = 4 w (se) gain = 20 db v cc = 12 v ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 f ? frequency ? hz power supply rejection ratio ? db g019 20 100 1k 10k 20k v cc = 24 v v o(ripple) = 0.2 v pp r l = 4 w (se) gain = 20 db ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 f ? frequency ? hz power supply rejection ratio ? db g025 20 100 1k 10k 20k v cc = 24 v v o(ripple) = 0.2 v pp r l = 8 w (se) gain = 20 db p o ? output power ? w 0.0 0.2 0.4 0.6 0.8 1.0 1.2 0 5 10 15 20 25 i cc ? supply current ? a g018 v cc = 24 v v cc = 18 v r l = 8 w (se) gain = 20 db
TPA3124D2 www.ti.com ........................................................................................................................................................................................................ slos578 ? may 2008 typical characteristics (continued) all tests are made at frequency = 1 khz unless otherwise noted. total harmonic distortion + noise total harmonic distortion + noise vs vs frequency output power figure 21. figure 22. output power efficiency vs vs supply voltage output power figure 24. a. dashed line represents thermally limited region. figure 23. copyright ? 2008, texas instruments incorporated submit documentation feedback 11 product folder link(s): TPA3124D2 p o ? output power ? w 0 10 20 30 40 50 60 70 80 90 100 0 2 4 6 8 10 12 ef ficiency ? % g024 r l = 8 w (btl) gain = 20 db v cc = 24 v v cc ? supply v oltage ? v 0 5 10 15 20 25 30 35 40 45 50 10 12 14 16 18 20 22 24 26 p o ? output power ? w g023 thd+n = 1% thd+n = 10% r l = 8 w (btl) gain = 20 db f ? frequency ? hz 20 v cc = 24 v r l = 8 w (btl) gain = 20 db 100 1k 10k thd+n ? t otal harmonic distortion + noise ? % 0.001 10 20k 0.1 g020 1 p o = 5 w p o = 20 w 0.01 p o = 1 w p o ? output power ? w 0.01 r l = 8 w (btl) gain = 20 db 0.1 1 10 thd+n ? t otal harmonic distortion + noise ? % 0.001 0.01 10 40 0.1 g021 1 v cc = 12 v v cc = 24 v v cc = 18 v
application information class-d operation traditional class-d modulation scheme supply pumping TPA3124D2 slos578 ? may 2008 ........................................................................................................................................................................................................ www.ti.com this section focuses on the class-d operation of the TPA3124D2. the TPA3124D2 operates in ad mode. there are two main configurations that may be used. for stereo operation, the TPA3124D2 should be configured in a single-ended (se) half-bridge amplifier. for mono applications, TPA3124D2 may be used as a bridge-tied-load (btl) amplifier. the traditional class-d modulation scheme, which is used in the TPA3124D2 btl configuration, has a differential output where each output is 180 degrees out of phase and changes from ground to the supply voltage, v cc . therefore, the differential prefiltered output varies between positive and negative v cc , where filtered 50% duty cycle yields 0 v across the load. the class-d modulation scheme with voltage and current waveforms is shown in figure 25 and figure 26 . figure 25. class-d modulation for TPA3124D2 se configuration figure 26. class-d modulation for TPA3124D2 btl configuration one issue encountered in single-ended (se) class-d amplifier designs is supply pumping. power-supply pumping is a rise in the local supply voltage due to energy being driven back to the supply by operation of the class-d amplifier. this phenomenon is most evident at low audio frequencies and when both channels are operating at the same frequency and phase. at low levels, power-supply pumping results in distortion in the audio output due to fluctuations in supply voltage. at higher levels, pumping can cause the overvoltage protection to operate, which temporarily shuts down the audio output. 12 submit documentation feedback copyright ? 2008, texas instruments incorporated product folder link(s): TPA3124D2 +v cc 0 v output current output current +v cc 0 v +v cc 0 v +v cc 0 v Cv cc differential voltage across speaker
gain setting via gain0 and gain1 inputs input resistance (1) TPA3124D2 www.ti.com ........................................................................................................................................................................................................ slos578 ? may 2008 several things can be done to relieve power-supply pumping. the lowest impact is to operate the two inputs out of phase 180 and reverse the speaker connections. because most audio is highly correlated, this causes the supply pumping to be out of phase and not as severe. if this is not enough, the amount of bulk capacitance on the supply must be increased. also, improvement is realized by hooking other supplies to this node, thereby, sinking some of the excess current. power-supply pumping should be tested by operating the amplifier at low frequencies and high output levels. the gain of the TPA3124D2 is set by two input terminals, gain0 and gain1. the gains listed in table 2 are realized by changing the taps on the input resistors and feedback resistors inside the amplifier. this causes the input impedance (z i ) to be dependent on the gain setting. the actual gain settings are controlled by ratios of resistors, so the gain variation from part-to-part is small. however, the input impedance from part-to-part at the same gain may shift by 20% due to shifts in the actual resistance of the input resistors. for design purposes, the input network (discussed in the next section) should be designed assuming an input impedance of 8 k ? , which is the absolute minimum input impedance of the TPA3124D2. at the higher gain settings, the input impedance could increase as high as 72 k ? . table 2. gain setting input impedance amplifier gain (db), gain1 gain0 (k ? ), typical typical 0 0 20 60 0 1 26 30 1 0 32 15 1 1 36 9 changing the gain setting can vary the input resistance of the amplifier from its smallest value, 10 k ? 20%, to the largest value, 60 k ? 20%. as a result, if a single capacitor is used in the input high-pass filter, the ? 3-db cutoff frequency may change when changing gain steps. the ? 3-db frequency can be calculated using equation 1 . use the z i values given in table 2 . copyright ? 2008, texas instruments incorporated submit documentation feedback 13 product folder link(s): TPA3124D2 f = 1 2 z c p i i c i in z i z f input signal
input capacitor, c i (2) (3) single-ended output capacitor, c o output filter and frequency response TPA3124D2 slos578 ? may 2008 ........................................................................................................................................................................................................ www.ti.com in the typical application, input capacitor c i is required to allow the amplifier to bias the input signal to the proper dc level for optimum operation. in this case c i and the input impedance of the amplifier (z i ) form a high-pass filter with the corner frequency determined in equation 2 . the value of c i is important, as it directly affects the bass (low-frequency) performance of the circuit. consider the example where z i is 20 k ? and the specification calls for a flat bass response down to 20 hz. equation 2 is reconfigured as equation 3 . in this example, c i is 0.4 m f; so, one would likely choose a value of 0.47 m f as this value is commonly used. if the gain is known and is constant, use z i from table 2 to calculate c i . a further consideration for this capacitor is the leakage path from the input source through the input network, c i , and the feedback network to the load. this leakage current creates a dc offset voltage at the input to the amplifier that reduces useful headroom, especially in high-gain applications. for this reason, a low-leakage tantalum or ceramic capacitor is the best choice. when polarized capacitors are used, the positive side of the capacitor should face the amplifier input in most applications as the dc level there is held at 2 v, which is likely higher than the source dc level. note that it is important to confirm the capacitor polarity in the application. additionally, lead-free solder can create dc offset voltages, and it is important to ensure that boards are cleaned properly. in single-ended (se) applications, the dc blocking capacitor forms a high-pass filter with the speaker impedance. the frequency response rolls off with decreasing frequency at a rate of 20 db/decade. the cutoff frequency is determined by f c = p c o z l table 3 shows some common component values and the associated cutoff frequencies: table 3. common filter responses c se - dc blocking capacitor ( m f) speaker impedance ( ? ) f c = 60 hz ( ? 3 db) f c = 40 hz ( ? 3 db) f c = 20 hz ( ? 3 db) 4 680 1000 2200 6 470 680 1500 8 330 470 1000 for the best frequency response, a flat-passband output filter (second-order butterworth) may be used. the output filter components consist of the series inductor and capacitor to ground at the lout and rout pins. there are several possible configurations, depending on the speaker impedance and whether the output configuration is single-ended (se) or bridge-tied load (btl). table 4 lists the recommended values for the filter components. it is important to use a high-quality capacitor in this application. a rating of at least x7r is required. 14 submit documentation feedback copyright ? 2008, texas instruments incorporated product folder link(s): TPA3124D2 c = i 1 2 z f p i c f = c 1 2 z c p i i C3 db f c
power-supply decoupling, c s TPA3124D2 www.ti.com ........................................................................................................................................................................................................ slos578 ? may 2008 table 4. recommended filter output components output configuration speaker impedance ( ? ) filter inductor ( m h) filter capacitor (nf) 4 22 680 single ended (se) 8 33 220 bridge tied load (btl) 8 22 680 figure 27. btl filter configuration figure 28. se filter configuration the TPA3124D2 is a high-performance cmos audio amplifier that requires adequate power-supply decoupling to ensure that the output total harmonic distortion (thd) is as low as possible. power-supply decoupling also prevents oscillations for long lead lengths between the amplifier and the speaker. the optimum decoupling is achieved by using two capacitors of different types that target different types of noise on the power-supply leads. for higher-frequency transients, spikes, or digital hash on the line, a good low equivalent-series-resistance (esr) ceramic capacitor, typically 0.1 m f to 1 m f, placed as close as possible to the device v cc lead works best. for filtering lower frequency noise signals, a larger aluminum electrolytic capacitor of 470 m f or greater placed near the audio power amplifier is recommended. the 470- m f capacitor also serves as local storage capacitor for supplying current during large signal transients on the amplifier outputs. the pvcc terminals provide the power to the output transistors, so a 470- m f or larger capacitor should be placed on each pvcc terminal. a 10- m f capacitor on the avcc terminal is adequate. these capacitors must be properly derated for voltage and ripple-current rating to ensure reliability. copyright ? 2008, texas instruments incorporated submit documentation feedback 15 product folder link(s): TPA3124D2 lout / rout l filter c filter lout l filter c filter l filter c filter rout
bsn and bsp capacitors TPA3124D2 slos578 ? may 2008 ........................................................................................................................................................................................................ www.ti.com figure 29. psrr without avcc filter figure 30. psrr with avcc filter figure 31. application schematic with 220- ? /220- m f avcc filter the half h-bridge output stages use only nmos transistors. therefore, they require bootstrap capacitors for the high side of each output to turn on correctly. a 220-nf ceramic capacitor, rated for at least 25 v, must be connected from each output to its corresponding bootstrap input. specifically, one 220-nf capacitor must be connected from lout to bsl, and one 220-nf capacitor must be connected from rout to bsr. the bootstrap capacitors connected between the bsx pins and their corresponding outputs function as a floating power supply for the high-side n-channel power mosfet gate-drive circuitry. during each high-side switching cycle, the bootstrap capacitors hold the gate-to-source voltage high enough to keep the high-side mosfets turned on. 16 submit documentation feedback copyright ? 2008, texas instruments incorporated product folder link(s): TPA3124D2 vcc mute shutdown c6 1 .0 f m r7 c12 0.22 f m 0.22 f m c19 + 1 2 TPA3124D2 pvccl1 1 sdz 2 pvccl2 3 mute 4 lin 5 rin 6 byp 7 gnd1 8 gnd2 9 pvccr1 10 vclamp 11 pvccr2 12 pvssr2 13 pvssr1 14 outr 15 bsr 16 gain1 17 gain0 18 avcc2 19 avcc1 20 bsl 21 outl 22 pvssl2 23 pvssl1 24 t herma l 25 r6 c 13 220 f m 220 w r8 c7 0.1 f m c8 4 70 f m + 1 2 c1 4 0.1 f m 0.2 2 f m c20 4.75 k w 4.75 k w + 1 2 c15 0.22 f m c2 470 f m + 1 2 0.1 f m c1 c5 1.0 f m c3 1.0 f m c4 1.0 f m l1 33 f m l2 33 f m c17 470 f m c10 470 f m ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 f ? frequency ? hz power supply rejection ratio ? db g027 20 100 1k 10k 20k v cc = 24 v v o(ripple) = 0.2 v pp r l = 8 w (se) gain = 20 db ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 f ? frequency ? hz power supply rejection ratio ? db g026 20 100 1k 10k 20k v cc = 24 v v o(ripple) = 0.2 v pp r l = 8 w (se) gain = 20 db
vclamp capacitor vbyp capacitor selection shutdown operation mute operation using low-esr capacitors short-circuit protection TPA3124D2 www.ti.com ........................................................................................................................................................................................................ slos578 ? may 2008 to ensure that the maximum gate-to-source voltage for the nmos output transistors is not exceeded, one internal regulator clamps the gate voltage. one 1- m f capacitor must be connected from vclamp (pin 11) to ground and must be rated for at least 16 v. the voltages at the vclamp terminal may vary with v cc and may not be used for powering any other circuitry. the scaled supply reference (vbyp) nominally provides an avcc/8 internal bias for the preamplifier stages. the external capacitor for this reference, c byp , is a critical component and serves several important functions. during start-up or recovery from shutdown mode, c byp determines the rate at which the amplifier starts. the start up time is proportional to 0.5 s per microfarad. thus, the recommended 1- m f capacitor results in a start-up time of approximately 500 ms. the second function is to reduce noise produced by the power supply caused by coupling with the output drive signal. this noise could result in degraded power-supply rejection and thd+n. the circuit is designed for a c byp value of 1 m f for best pop performance. the input capacitors should have the same value. a ceramic or tantalum low-esr capacitor is recommended. the TPA3124D2 employs a shutdown mode of operation designed to reduce supply current (i cc ) to the absolute minimum level during periods of nonuse for power conservation. the shutdown input terminal should be held high (see specification table for trip point) during normal operation when the amplifier is in use. pulling shutdown low causes the outputs to mute and the amplifier to enter a low-current state. never leave shutdown unconnected, because amplifier operation would be unpredictable. for the best power-up pop performance, place the amplifier in the shutdown or mute mode prior to applying the power-supply voltage. the mute pin is an input for controlling the output state of the TPA3124D2. a logic high on this terminal causes the outputs to run at a constant 50% duty cycle. a logic low on this pin enables the outputs. this terminal may be used as a quick disable/enable of outputs when changing channels on a television or transitioning between different audio sources. the mute terminal should never be left floating. for power conservation, the shutdown terminal should be used to reduce the quiescent current to the absolute minimum level. low-esr capacitors are recommended throughout this application section. a real (as opposed to ideal) capacitor can be modeled simply as a resistor in series with an ideal capacitor. the voltage drop across this resistor minimizes the beneficial effects of the capacitor in the circuit. the lower the equivalent value of this resistance, the more the real capacitor behaves like an ideal capacitor. the TPA3124D2 has short-circuit protection circuitry on the outputs that prevents damage to the device during output-to-output shorts and output-to-gnd shorts after the filter and output capacitor (at the speaker terminal.) directly at the device terminals, the protection circuitry prevents damage to device during output-to-output, output-to-ground, and output-to-supply. when a short circuit is detected on the outputs, the part immediately disables the output drive. this is an unlatched fault. normal operation is restored when the fault is removed. copyright ? 2008, texas instruments incorporated submit documentation feedback 17 product folder link(s): TPA3124D2
thermal protection printed-circuit board (pcb) layout TPA3124D2 slos578 ? may 2008 ........................................................................................................................................................................................................ www.ti.com thermal protection on the TPA3124D2 prevents damage to the device when the internal die temperature exceeds 150 c. there is a 15 c tolerance on this trip point from device to device. once the die temperature exceeds the thermal set point, the device enters into the shutdown state and the outputs are disabled. this is not a latched fault. the thermal fault is cleared once the temperature of the die is reduced by 30 c. the device begins normal operation at this point with no external system interaction. because the TPA3124D2 is a class-d amplifier that switches at a high frequency, the layout of the printed-circuit board (pcb) should be optimized according to the following guidelines for the best possible performance. decoupling capacitors ? the high-frequency 0.1- m f decoupling capacitors should be placed as close to the pvcc (pins 1, 3, 10, and 12) and avcc (pins 19 and 20) terminals as possible. the vbyp (pin 7) capacitor and vclamp (pin 11) capacitor should also be placed as close to the device as possible. large (220- m f or greater) bulk power-supply decoupling capacitors should be placed near the TPA3124D2 on the pvccl and pvccr terminals. grounding ? the avcc (pins 19 and 20) decoupling capacitor and vbyp (pin 7) capacitor should each be grounded to analog ground (agnd, pins 8 and 9). the pvccx decoupling capacitors and vclamp capacitors should each be grounded to power ground (pgnd, pins 13, 14, 23, and 24). analog ground and power ground should be connected at the thermal pad, which should be used as a central ground connection or star ground for the TPA3124D2. output filter ? the reconstruction filter (l1, l2, c9, and c16) should be placed as close to the output terminals as possible for the best emi performance. the capacitors should be grounded to power ground. thermal pad ? the thermal pad must be soldered to the pcb for proper thermal performance and optimal reliability. the dimensions of the thermal pad and thermal land are described in the mechanical section at the back of the data sheet. see ti technical briefs slma002 and sloa120 for more information about using the thermal pad. for recommended pcb footprints, see figures at the end of this data sheet. for an example layout, see the TPA3124D2 evaluation module (TPA3124D2evm) user manual, (slou189 ). both the evm user manual and the thermal pad application note are available on the ti web site at http://www.ti.com . 18 submit documentation feedback copyright ? 2008, texas instruments incorporated product folder link(s): TPA3124D2
TPA3124D2 www.ti.com ........................................................................................................................................................................................................ slos578 ? may 2008 figure 32. schematic for single-ended (se) configuration (8- ? speaker) figure 33. schematic for bridge-tied-load (btl) configuration (8- ? speaker) copyright ? 2008, texas instruments incorporated submit documentation feedback 19 product folder link(s): TPA3124D2 + in Cin +out Cout vcc vcc shutdown control mute control 10 f m 22 h m 470 f m 0.68 f m TPA3124D2 pvccl 1 sd 2 pvccl 3 mute 4 lin 5 rin 6 bypass 7 agnd 8 agnd 9 pvccr 10 vclamp 11 pvccr 12 pgndr 13 pgndr 14 rout 15 bsr 16 gain1 17 gain0 18 avcc 19 avcc 20 bsl 21 lout 22 pgndl 23 pgndl 24 thermal 25 1.0 f m 0.22 f m 0.1 f m 1.0 f m 470 f m 1.0 f m 1.0 f m 1.0 f m 1.0 f m 0.22 f m 22 h m 0.68 f m s0294-02 vcc vcc left in shutdown control mute control right in 10 f m 470 f m 0.22 f tp TPA3124D2 pvccl 1 sd 2 pvccl 3 mute 4 lin 5 rin 6 bypass 7 agnd 8 agnd 9 pvccr 10 vclamp 11 pvccr 12 pgndr 13 pgndr 14 rout 15 bsr 16 gain1 17 gain0 18 avcc 19 avcc 20 bsl 21 lout 22 pgndl 23 pgndl 24 thermal 25 1.0 f m +lout 0.22 f m Crout Clout +rout 0.1 f m 1.0 f m 470 470 470 f f f m m m 1.0 f m 1.0 f m 1.0 f m 1.0 f m 0.22 f m 0.22 f 33 h33 h s0268-02
basic measurement system TPA3124D2 slos578 ? may 2008 ........................................................................................................................................................................................................ www.ti.com this section focuses on methods that use the basic equipment listed below: audio analyzer or spectrum analyzer digital multi meter (dmm) oscilloscope twisted-pair wires signal generator power resistor(s) linear regulated power supply filter components evm or other complete audio circuit figure 34 shows the block diagrams of basic measurement systems for class-ab and class-d amplifiers. a sine wave is normally used as the input signal because it consists of the fundamental frequency only (no other harmonics are present). an analyzer is then connected to the audio power amplifier (apa) output to measure the voltage output. the analyzer must be capable of measuring the entire audio bandwidth. a regulated dc power supply is used to reduce the noise and distortion injected into the apa through the power pins. a system two? audio measurement system (ap-ii) by audio precision? includes the signal generator and analyzer in one package. the generator output and amplifier input must be ac-coupled. however, the evms already have the ac-coupling capacitors c in , so no additional coupling is required. the generator output impedance should be low to avoid attenuating the test signal, and is important because the input resistance of apas is not high. conversely, the analyzer input impedance should be high. the output resistance, r out , of the apa is normally in the hundreds of milliohms and can be ignored for all but the power-related calculations. figure 34 (a) shows a class-ab amplifier system. it takes an analog signal input and produces an analog signal output. this amplifier circuit can be directly connected to the ap-ii or other analyzer input. this is not true of the class-d amplifier system shown in figure 34 (b), which requires low-pass filters in most cases in order to measure the audio output waveforms. this is because it takes an analog input signal and converts it into a pulse-width modulated (pwm) output signal that is not accurately processed by some analyzers. 20 submit documentation feedback copyright ? 2008, texas instruments incorporated product folder link(s): TPA3124D2
TPA3124D2 www.ti.com ........................................................................................................................................................................................................ slos578 ? may 2008 figure 34. audio measurement systems copyright ? 2008, texas instruments incorporated submit documentation feedback 21 product folder link(s): TPA3124D2 analyzer 20 hz - 20 khz (a) basic class-ab apa signal generator power supply analyzer 20 hz - 20 khz r l (b) traditional class-d class-d apa signal generator power supply r l l filt c filt
se input and se output (TPA3124D2 stereo configuration) TPA3124D2 slos578 ? may 2008 ........................................................................................................................................................................................................ www.ti.com the se input and output configuration is used with class-ab amplifiers. a block diagram of a fully se measurement circuit is shown in figure 35 . se inputs normally have one input pin per channel. in some cases, two pins are present; one is the signal and the other is ground. se outputs have one pin driving a load through an output ac-coupling capacitor and the other end of the load is tied to ground. se inputs and outputs are considered to be unbalanced, meaning one end is tied to ground and the other to an amplifier input/output. the generator should have unbalanced outputs, and the signal should be referenced to the generator ground for best results. unbalanced or balanced outputs can be used when floating, but they may create a ground loop that affects the measurement accuracy. the analyzer should have balanced inputs to cancel out any common-mode noise in the measurement. figure 35. se input ? se output measurement circuit the following general rules should be followed when connecting to apas with se inputs and outputs: use an unbalanced source to supply the input signal. use an analyzer with balanced inputs. use twisted-pair wire for all connections. use shielding when the system environment is noisy. ensure the cables from the power supply to the apa, and from the apa to the load, can handle the large currents (see table 5 ). 22 submit documentation feedback copyright ? 2008, texas instruments incorporated product folder link(s): TPA3124D2 v gen c in c l r in r gen twisted-pair wire generator evaluation module audio power amplifier twisted-pair wire r l r ana c ana analyzer r ana c ana l filt c filt
differential input and btl output (TPA3124D2 mono configuration) TPA3124D2 www.ti.com ........................................................................................................................................................................................................ slos578 ? may 2008 many of the class-d apas and many class-ab apas have differential inputs and bridge-tied-load (btl) outputs. differential inputs have two input pins per channel and amplify the difference in voltage between the pins. differential inputs reduce the common-mode noise and distortion of the input circuit. btl is a term commonly used in audio to describe differential outputs. btl outputs have two output pins providing voltages that are 180 out of phase. the load is connected between these pins. this has the added benefits of quadrupling the output power to the load and eliminating a dc-blocking capacitor. a block diagram of the measurement circuit is shown in figure 36 . the differential input is a balanced input, meaning the positive (+) and negative ( ? ) pins have the same impedance to ground. similarly, the se output equates to a balanced output. figure 36. differential input, btl output measurement circuit the generator should have balanced outputs, and the signal should be balanced for best results. an unbalanced output can be used, but it may create a ground loop that affects the measurement accuracy. the analyzer must also have balanced inputs for the system to be fully balanced, thereby cancelling out any common-mode noise in the circuit and providing the most accurate measurement. the following general rules should be followed when connecting to apas with differential inputs and btl outputs: use a balanced source to supply the input signal. use an analyzer with balanced inputs. use twisted-pair wire for all connections. use shielding when the system environment is noisy. ensure that the cables from the power supply to the apa, and from the apa to the load, can handle the large currents (see table 5 ). table 5 shows the recommended wire size for the power supply and load cables of the apa system. the real concern is the dc or ac power loss that occurs as the current flows through the cable. these recommendations are based on 12-inch (30.5-cm)-long wire with a 20-khz sine-wave signal at 25 c. table 5. recommended minimum wire size for power cables dc power loss ac power loss p out (w) r l ( ? ) awg size (mw) (mw) 10 4 18 22 16 40 18 42 2 4 18 22 3.2 8 3.7 8.5 1 8 22 28 2 8 2.1 8.1 < 0.75 8 22 28 1.5 6.1 1.6 6.2 copyright ? 2008, texas instruments incorporated submit documentation feedback 23 product folder link(s): TPA3124D2 c in audio power amplifier generator c in r gen r gen r in r in v gen analyzer r ana r ana c ana r l c ana twisted-pair wire evaluation module twisted-pair wire l filt l filt c filt c filt
tape and reel information *all dimensions are nominal device package type package drawing pins spq reel diameter (mm) reel width w1 (mm) a0 (mm) b0 (mm) k0 (mm) p1 (mm) w (mm) pin1 quadrant TPA3124D2pwpr htssop pwp 24 2000 330.0 16.4 6.95 8.3 1.6 8.0 16.0 q1 package materials information www.ti.com 7-jun-2008 pack materials-page 1
*all dimensions are nominal device package type package drawing pins spq length (mm) width (mm) height (mm) TPA3124D2pwpr htssop pwp 24 2000 346.0 346.0 33.0 package materials information www.ti.com 7-jun-2008 pack materials-page 2

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